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MCP6441
450 nA, 9 kHz Op Amp
Features:
* * * * * * * * * Low Quiescent Current: 450 nA (typical) Gain Bandwidth Product: 9 kHz (typical) Supply Voltage Range: 1.4V to 6.0V Rail-to-Rail Input and Output Unity Gain Stable Slew Rate: 3V/ms (typical) Extended Temperature Range: -40C to +125C No Phase Reversal Small Packages
Description:
The MCP6441 device is a single nanopower operational amplifier (op amp), which has low quiescent current (450 nA, typical) and rail-to-rail input and output operation. This op amp is unity gain stable and has a gain bandwidth product of 9 kHz (typical). These devices operate with a single supply voltage as low as 1.4V. These features make the family of op amps well suited for single-supply, battery-powered applications. The MCP6441 op amp is designed with Microchip's advanced CMOS process and offered in the 5-pin SC70 and SOT-23 single packages. All devices are available in the extended temperature range, with a power supply range of 1.4V to 6.0V.
Applications:
* * * * * * Portable Equipment Battery Powered System Data Acquisition Equipment Sensor Conditioning Battery Current Sensing Analog Active Filters
Package Types
MCP6441 SC70-5, SOT-23-5 VOUT 1 VSS 2 VIN+ 3 5 VDD 4 VIN-
Design Aids:
* * * * * * SPICE Macro Models FilterLab(R) Software MindiTM Circuit Designer and Simulator Microchip Advanced Part Selector (MAPS) Analog Demonstration and Evaluation Boards Application Notes
Typical Application
IDD 1.4V to 6.0V 10 100 k VDD MCP6441 1 M V DD - V OUT I DD = ----------------------------------------( 10 V/V ) ( 10 ) Battery Current Sensing VOUT To load
(c) 2010 Microchip Technology Inc.
DS22257A-page 1
MCP6441
NOTES:
DS22257A-page 2
(c) 2010 Microchip Technology Inc.
MCP6441
1.0
1.1
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. See Section 4.1.2 "Input Voltage Limits".
VDD - VSS ........................................................................7.0V Current at Input Pins .....................................................2 mA Analog Inputs (VIN+, VIN-) .......... VSS - 1.0V to VDD + 1.0V All Other Inputs and Outputs ......... VSS - 0.3V to VDD + 0.3V Difference Input Voltage ...................................... |VDD - VSS| Output Short-Circuit Current ................................ Continuous Current at Output and Supply Pins ............................30 mA Storage Temperature ....................................-65C to +150C Maximum Junction Temperature (TJ) .......................... +150C ESD Protection on All Pins (HBM; MM) ............... 4 kV; 400V
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.4V to +6.0V, VSS= GND, TA= +25C, VCM = VDD/2, VOUT VDD/2, VL = VDD/2 and RL = 1 M to VL. (Refer to Figure 1-1). Parameters Input Offset Input Offset Voltage Input Offset Drift with Temperature Power Supply Rejection Ratio Input Bias Current and Impedance Input Bias Current IB -- -- -- Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode Common Mode Input Voltage Range Common Mode Rejection Ratio Open-Loop Gain DC Open-Loop Gain (Large Signal) Output Maximum Output Voltage Swing Output Short-Circuit Current Power Supply Supply Voltage Quiescent Current per Amplifier VDD IQ 1.4 250 -- 450 6.0 650 V nA IO = 0, VDD = 5.0V VOL, VOH ISC VSS+20 -- -- -- 3 22 VDD-20 -- -- mV mA mA VDD = 6.0V, RL = 10 k 0.5V input overdrive VDD = 1.4V VDD = 6.0V AOL 90 110 -- dB VOUT = 0.1V to VDD-0.1V RL = 10 k to VL VCMR CMRR VSS-0.3 60 -- 76 VDD+0.3 -- V dB VCM = -0.3V to 6.3V, VDD = 6.0V IOS ZCM ZDIFF -- -- -- 1 20 400 1 1013||6 1013||6 -- -- -- -- -- -- pA pA pA pA ||pF ||pF TA = +85C TA = +125C VOS VOS/TA PSRR -4.5 -- 65 -- 2.5 86 +4.5 -- -- mV VCM = VSS V/C TA= -40C to +125C, VCM = VSS dB VCM = VSS Sym Min Typ Max Units Conditions
(c) 2010 Microchip Technology Inc.
DS22257A-page 3
MCP6441
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF. (Refer to Figure 1-1). Parameters AC Response Gain Bandwidth Product Phase Margin Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density Eni eni ini -- -- -- 5 190 0.6 -- -- -- Vp-p nV/Hz fA/Hz f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz GBWP PM SR -- -- -- 9 65 3 -- -- -- kHz V/ms G = +1 V/V Sym Min Typ Max Units Conditions
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.4V to +6.0V and VSS = GND. Parameters Temperature Ranges Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SC70 Thermal Resistance, 5L-SOT-23 Note 1: JA JA -- -- 331 220.7 -- -- C/W C/W TA TA -40 -65 -- -- +125 +150 C C Note 1 Sym Min Typ Max Units Conditions
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150C.
1.2
Test Circuits
CF 6.8 pF RG 100 k VP VIN+ MCP6441 VIN- VM RG 100 k RF 100 k CF 6.8 pF RL 1 M VOUT CL 60 pF CB1 100 nF RF 100 k VDD VDD/2
The circuit used for most DC and AC tests is shown in Figure 1-1. This circuit can independently set VCM and VOUT (see Equation 1-1). Note that VCM is not the circuit's Common Mode voltage ((VP + VM)/2), and that VOST includes VOS plus the effects (on the input offset error, VOST) of the temperature, CMRR, PSRR and AOL.
EQUATION 1-1:
G DM = RF RG V CM = ( V P + VDD 2 ) 2
CB2 1 F
V OUT = ( V DD 2 ) + ( V P - V M ) + VOST ( 1 + G DM ) Where: GDM = Differential Mode Gain VCM = Op Amp's Common Mode Input Voltage VOST = Op Amp's Total Input Offset Voltage (V/V) (V) (mV)
V OST = V IN- - VIN+
VL
FIGURE 1-1: AC and DC Test Circuit for Most Specifications.
DS22257A-page 4
(c) 2010 Microchip Technology Inc.
MCP6441
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF.
35% Percentage of Occurences 30% 25% 20% 15% 10% 5% 0% -3.5 -0.5 -4.5 -2.5 -1.5 3.5 1.5 2.5 4.5 0.5 Input Offset Voltage (mV)
1700 Samples VCM = VSS
4000 Input Offset Voltage (V) 3500 3000 2500 2000 1500 1000 500 0 -500 1.3 1.5 5.5 6.0 -0.3 -0.1 Common mode input voltage (V) 1.7 6.5 6.0 0.1 0.3 0.5 0.7 0.9 1.1 4.0 5.0
TA = +125C TA = +85C TA = +25C TA = -40C VDD = 1.4V Representative Part
FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.4V.
1000 800 600 400 200 0 -200 -400 -600 -800 -1000 0.0 0.5 1.0 1.5
30% Percentage of Occurences 25% 20% 15% 10% 5% 0% -2 -8 -6 -4 0 2 4 6 -10 8 10 Input Offset Voltage Drift (V/C) Input Offset Voltage (V)
1700 Samples VCM = VSS TA = -40C to +125C
VDD = 1.4V VDD = 6.0V
Representative Part
Output Voltage (V)
FIGURE 2-2:
Input Offset Voltage Drift.
FIGURE 2-5: Output Voltage.
2000 1600 1200 800 400 0 -400 -800 -1200 -1600 -2000 1.0 1.5
Input Offset Voltage vs.
3000 Input Offset Voltage (V) 2500 2000 1500 1000 500 0 -500 5.5 -0.5 6.5 1.5 2.5 3.5 4.5 0.0 0.5 1.0 2.0 3.0 4.0 5.0 6.0 Common Mode Input Voltage (V) Input Offset Voltage (V)
VDD = 6.0V Representative Part TA = +125C TA = +85C TA = +25C TA = -40C
TA = TA = TA = TA =
+125C +85C +25C -40C
Representative Part
2.0
2.5
3.0
3.5
4.0
4.5
Power Supply Voltage (V)
FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 6.0V.
FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage.
(c) 2010 Microchip Technology Inc.
DS22257A-page 5
5.5
5.0
2.0
2.5
3.0
3.5
4.5
MCP6441
Note: Unless otherwise indicated, TA = +25C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF.
1,000 Input Noise Voltage Density (nV/Hz)
100 0.1 0.1 1 1 10 100 10 100 Frequency (Hz) 1k 1000 10k 10000
100 95 90 85 80 75 70 65 60 55 50 -50
PSRR (VDD = 1.4V to 6.0V, VCM = VSS)
CMRR,PSRR (dB)
CMRR (VDD = 6.0V, VCM = -0.3V to 6.3V) CMRR (VDD = 1.4V, VCM = -0.3V to 1.7V)
-25
0 25 50 75 Ambient Temperature (C)
100
125
FIGURE 2-7: vs. Frequency.
350 300 250 200 150 100 50 0 -0.5 0.0 0.5 1.0
Input Noise Voltage Density
FIGURE 2-10: Temperature.
Input Bias and Offset Currents (pA) 1000
VDD = 6.0V
CMRR, PSRR vs. Ambient
Input Noise Voltage Density (nV/Hz)
100
Input Bias Current
f = 1 kHz VDD = 6.0 V
10
Input Offset Current
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
1 25 45 65 85 105 Ambient Temperature (C) 125
Common Mode Input Voltage (V)
FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage.
100 90 CMRR, PSRR (dB) 80 70 60
c
FIGURE 2-11: Input Bias, Offset Current vs. Ambient Temperature.
1000 Input Bias Current (pA)
PSRR-
Representative Part
TA = +125C
PSRR+ CMRR
100
TA = +85C
50 40 30 20 0.1 1 10 Frequency (Hz) 100 1000
10
VDD = 6.0V
1 1.0 1.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) 6.0 0.0 0.5 2.0
FIGURE 2-9: Frequency.
CMRR, PSRR vs.
FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage.
DS22257A-page 6
(c) 2010 Microchip Technology Inc.
MCP6441
Note: Unless otherwise indicated, TA = +25C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF.
600 550 Quiescent Current (nA/Amplifier) 500 450 400 350 300 250 200 -50 -25 0 25 50 75 100 Ambient Temperature (C) 125
VDD = 1.4V VDD = 6.0V
130 DC Open-Loop Gain (dB) 120 110 100 90 80 70 60 3.0 Power Supply Voltage (V) 6.0 0.25 Phase Margin () 1.0 1.5 2.0 3.5 4.0 4.5 5.0 2.5 5.5 90
Phase Margin RL = 10 k VSS + 0.1V < VOUT < VDD - 0.1V
FIGURE 2-13: Quiescent Current vs. Ambient Temperature.
700
FIGURE 2-16: DC Open-Loop Gain vs. Power Supply Voltage.
130 DC Open-Loop Gain (dB) 120 110 100 90 80 70 60 0.00
Large Signal AOL RL = 10k VDD = 1.4V VDD = 6.0V
600 Quiescent Current (nA/Amplifier) 500 400 300 200 100 0 4.5 5.0 5.5 6.0 6.5 7.0 2.5 3.0 3.5 4.0 0.0 0.5 1.0 1.5 2.0 Power Supply Voltage (V)
TA = TA = TA = TA = +125C +85C +25C -40C
0.05 0.10 0.15 0.20 Output Voltage Headroom (V)
FIGURE 2-14: Quiescent Current vs. Power Supply Voltage.
120 Open-Loop Gain (dB) 100 80 60 40 20 0 -20
VDD = 6.0V Open-Loop Phase Open-Loop Gain
FIGURE 2-17: DC Open-Loop Gain vs. Output Voltage Headroom.
18 Gain Bandwidth Product (kHz) 16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 Ambient Temperature (C)
VDD = 6.0V Gain Bandwidth Product
0 Open-Loop Phase () -30 -60 -90 -120 -150 -180
80 70 60 50 40 30 20 10 0 125
-210 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1m 10m 0.1 1 10 100 1k 10k 100k Frequency (Hz)
FIGURE 2-15: Frequency.
Open-Loop Gain, Phase vs.
FIGURE 2-18: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature.
(c) 2010 Microchip Technology Inc.
DS22257A-page 7
MCP6441
Note: Unless otherwise indicated, TA = +25C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF.
Output Voltage Headroom (mV) 18 Gain Bandwidth Product (kHz) 16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 Ambient Temperature (C)
VDD = 1.4V Gain Bandwidth Product
Phase Margin
90 80 60 50 40 30 20 10 0 125 Phase Margin () 70
1000
VDD - VOH @ VDD = 1.4V VOL - VSS @ VDD = 1.4V
100
10
VDD - VOH @ VDD = 6.0V VOL - VSS @ VDD = 6.0V RL = 10 k
1
0.1 0.01 10
0.1 1 100 1000 Output Current (mA)
10 10000
FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature.
35 30 25 20 15 10 5 0 1.0 4.5 5.5 0.0 3.5 0.5 1.5 2.0 2.5 3.0 4.0 5.0 6.0 Power Supply Voltage (V)
TA = -40C TA = +25C TA = +85C TA = +125C
FIGURE 2-22: Output Voltage Headroom vs. Output Current.
25 Output Voltage Headroom VDD - VOH or VOL - VSS (mV) 20 15 10 5 0 -50 -25 0 25 50 75 100 Ambient Temperature (C) 125
VDD - VOH @ VDD = 1.4V VOL - VSS @ VDD = 1.4V VDD - VOH @ VDD = 6.0V VOL - VSS @ VDD = 6.0V
FIGURE 2-20: Output Short Circuit Current vs. Power Supply Voltage.
10 Output Voltage Swing (V P-P)
Output Short Circuit Current (mA)
FIGURE 2-23: Output Voltage Headroom vs. Ambient Temperature.
6 5 Slew Rate (V/ms)
Falling Edge, VDD = 6.0V Rising Edge, VDD = 6.0V
VDD = 6.0V
VDD = 1.4V
4 3 2 1
Falling Edge, VDD = 1.4V Rising Edge, VDD = 1.4V
1
0.1 10 100 1k 100 1000 Frequency (Hz) 10k 10000
0 -50 -25 0 25 50 75 Ambient Temperature (C) 100 125
FIGURE 2-21: Frequency.
Output Voltage Swing vs.
FIGURE 2-24: Temperature.
Slew Rate vs. Ambient
DS22257A-page 8
(c) 2010 Microchip Technology Inc.
MCP6441
Note: Unless otherwise indicated, TA = +25C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF.
6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0
Output Voltage (20 mv/div)
VDD = 6.0V G = +1 V/V
Time (200 s/div)
Output Voltage (V)
VDD = 6.0V G = -1 V/V
Time (2 ms/div)
FIGURE 2-25: Pulse Response.
Small Signal Non-Inverting
FIGURE 2-28: Response.
7.0
Large Signal Inverting Pulse
Output Voltage (20 mv/div)
VDD = 6.0V G = -1 V/V
Input,Output Voltage (V)
6.0 5.0 4.0 3.0 2.0 1.0 0.0 -1.0
VDD = 6.0V G = +2 V/V VIN VOUT
Time (200 s/div)
Time (2 ms/div)
FIGURE 2-26: Response.
6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0
Small Signal Inverting Pulse
FIGURE 2-29: The MCP6441 Device Shows No Phase Reversal.
1M Closed Loop Output Impedance ()
1000000
100k 10k 1k
100000
Output Voltage (V)
10000
1000
VDD = 6.0V G = +1 V/V
100 10 1
100
10
G N: 101 V/V 11 V/V 1 V/V
1
1
1
10
10
100
100
1000
1k
10k
10000
Time (2 ms/div)
Frequency (Hz)
FIGURE 2-27: Pulse Response.
Large Signal Non-Inverting
FIGURE 2-30: Closed Loop Output Impedance vs. Frequency.
(c) 2010 Microchip Technology Inc.
DS22257A-page 9
MCP6441
Note: Unless otherwise indicated, TA = +25C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF.
1m 1.E-03 100 1.E-04 10 1.E-05 1 1.E-06 -IIN (A) 100n 1.E-07 10n 1.E-08 1n 1.E-09 100p 1.E-10 10p 1.E-11
TA = -40C TA = +25C TA = +85C TA = +125C
1p 1.E-12 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V)
FIGURE 2-31: Measured Input Current vs. Input Voltage (below VSS).
DS22257A-page 10
(c) 2010 Microchip Technology Inc.
MCP6441
3.0 PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
MCP6441
PIN FUNCTION TABLE
Symbol VOUT VSS VIN+ VIN- VDD Analog Output Negative Power Supply Non-inverting Input Inverting Input Positive Power Supply Description
SC70-5, SOT-23-5 1 2 3 4 5
3.1
Analog Output (VOUT)
The output pin is a low-impedance voltage source.
3.2
Power Supply Pins (VDD, VSS)
The positive power supply (VDD) is 1.4V to 6.0V higher than the negative power supply (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need bypass capacitors.
3.3
Analog Inputs (VIN+, VIN-)
The non-inverting and inverting inputs are highimpedance CMOS inputs with low bias currents.
(c) 2010 Microchip Technology Inc.
DS22257A-page 11
MCP6441
NOTES:
DS22257A-page 12
(c) 2010 Microchip Technology Inc.
MCP6441
4.0 APPLICATION INFORMATION
The MCP6441 op amp is manufactured using Microchip's state-of-the-art CMOS process, specifically designed for low power applications. In some applications, it may be necessary to prevent excessive voltages from reaching the op amp inputs; Figure 4-2 shows one approach to protecting these inputs. VDD D1 V1 MCP6441 V2 D2
4.1
4.1.1
Rail-to-Rail Input
PHASE REVERSAL
The MCP6441 op amp is designed to prevent phase reversal, when the input pins exceed the supply voltages. Figure 2-29 shows the input voltage exceeding the supply voltage with no phase reversal.
U1 VOUT
4.1.2
INPUT VOLTAGE LIMITS FIGURE 4-2: Inputs. Protecting the Analog
In order to prevent damage and/or improper operation of the amplifier, the circuit must limit the voltages at the input pins (see Section 1.1 "Absolute Maximum Ratings "). The Electrostatic Discharge (ESD) protection on the inputs can be depicted as shown in Figure 4-1. This structure was chosen to protect the input transistors against many, but not all, over-voltage conditions, and to minimize the input bias current (IB). Bond Pad
A significant amount of current can flow out of the inputs when the Common Mode voltage (VCM) is below ground (VSS); See Figure 2-31.
4.1.3
INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation of the amplifier, the circuit must limit the currents into the input pins (see Section 1.1 "Absolute Maximum Ratings "). Figure 4-3 shows one approach to protecting these inputs. The resistors R1 and R2 limit the possible currents in or out of the input pins (and the ESD diodes, D1 and D2). The diode currents will go through either VDD or VSS. VDD
VDD
VIN+ Bond Pad
Input Stage
Bond V - IN Pad
VSS Bond Pad
D1
D2
U1 MCP6441 VOUT
FIGURE 4-1: Structures.
Simplified Analog Input ESD
V1 R1 V2 R2 min(R1,R2) > min(R1,R2) > VSS - min(V1, V2) 2 mA max(V1,V2) - VDD 2 mA
The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltages that go well above VDD; their breakdown voltage is high enough to allow normal operation, but not low enough to protect against slow over-voltage (beyond VDD) events. Very fast ESD events that meet the spec are limited so that damage does not occur.
FIGURE 4-3: Inputs.
Protecting the Analog
(c) 2010 Microchip Technology Inc.
DS22257A-page 13
MCP6441
4.1.4 NORMAL OPERATION
The input stage of the MCP6441 op amp uses two differential input stages in parallel. One operates at a low Common Mode input voltage (VCM), while the other operates at a high VCM. With this topology, the device operates with a VCM up to 300 mV above VDD and 300 mV below VSS. The input offset voltage is measured at VCM = VSS - 0.3V and VDD + 0.3V, to ensure proper operation. The transition between the input stages occurs when VCM is near VDD - 0.6V (see Figures 2-3 and 2-4). For the best distortion performance and gain linearity, with non-inverting gains, avoid this region of operation. Figure 4-5 gives the recommended RISO values for the different capacitive loads and gains. The x-axis is the normalized load capacitance (CL/GN), where GN is the circuit's noise gain. For non-inverting gains, GN and the Signal Gain are equal. For inverting gains, GN is 1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
1000000 1M Recommended RISO ()
100k 100000
G N: 1 V/V 2 V/V 5 V/V
10k 10000
4.2
Rail-to-Rail Output
The output voltage range of the MCP6441 op amp is VSS + 20 mV (minimum) and VDD - 20 mV (maximum) when RL = 10 k is connected to VDD/2 and VDD = 6.0V. Refer to Figures 2-22 and 2-23 for more information.
1k 1000 10p 100p 1n 10n 0.1 1 1.E-11 1.E-10 1.E-09 1.E-08 1.E-07 1.E-06 Normalized Load Capacitance; CL/GN (F)
FIGURE 4-5: Recommended RISO Values for Capacitive Loads.
After selecting RISO for your circuit, double-check the resulting frequency response peaking and step response overshoot. Modify RISO's value until the response is reasonable. Bench evaluation and simulations with the MCP6441 SPICE macro model are very helpful.
4.3
Capacitive Loads
Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load capacitance increases, the feedback loop's phase margin decreases, and the closed-loop bandwidth is reduced. This produces gain peaking in the frequency response, with overshoot and ringing in the step response. While a unity-gain buffer (G = +1 V/V) is the most sensitive to the capacitive loads, all gains show the same general behavior. When driving large capacitive loads with the MCP6441 op amp (e.g., > 100 pF when G = +1 V/V), a small series resistor at the output (RISO in Figure 4-4) improves the feedback loop's phase margin (stability) by making the output load resistive at higher frequencies. The bandwidth will be generally lower than the bandwidth with no capacitance load.
4.4
Supply Bypass
The MCP6441 op amp's power supply pin (VDD for single-supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good high frequency performance. It can use a bulk capacitor (i.e., 1 F or larger) within 100 mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts.
4.5
PCB Surface Leakage
- MCP6441 VIN +
RISO VOUT CL
In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow, which is greater than the MCP6441 op amp's bias current at +25C (1 pA, typical).
FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads.
DS22257A-page 14
(c) 2010 Microchip Technology Inc.
MCP6441
The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 4-6. Guard Ring VIN- VIN+ VSS
4.6
4.6.1
Application Circuits
BATTERY CURRENT SENSING
The MCP6441 op amp's Common Mode Input Range, which goes 0.3V beyond both supply rails, supports their use in high-side and low-side battery current sensing applications. The low quiescent current (450 nA, typical) helps prolong battery life, and the rail-to-rail output supports detection of low currents. Figure 4-7 shows a high side battery current sensor circuit. The 10 resistor is sized to minimize power losses. The battery current (IDD) through the 10 resistor causes its top terminal to be more negative than the bottom terminal. This keeps the Common Mode input voltage of the op amp below VDD, which is within its allowed range. The output of the op amp will also be below VDD, within its Maximum Output Voltage Swing specification. IDD 1.4V to 6.0V 10 100 k VDD MCP6441 1 M VDD - VOUT I DD = ----------------------------------------( 10 V/V ) ( 10 )
FIGURE 4-6: for Inverting Gain.
1.
Example Guard Ring Layout
2.
Non-inverting Gain and Unity-Gain Buffer: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN-). This biases the guard ring to the Common Mode input voltage. Inverting Gain and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors): a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN-) to the input with a wire that does not touch the PCB surface.
To load VOUT
FIGURE 4-7:
Battery Current Sensing.
(c) 2010 Microchip Technology Inc.
DS22257A-page 15
MCP6441
4.6.2 PRECISION HALF-WAVE RECTIFIER 4.6.3 INSTRUMENTATION AMPLIFIER
The precision half-wave rectifier, which is also known as a super diode, is a configuration obtained with an operational amplifier in order to have a circuit behaving like an ideal diode and rectifier. It effectively cancels the forward voltage drop of the diode in such way that very low level signals can still be rectified, with minimal error. This can be useful for high-precision signal processing. The MCP6441 op amp has high input impedance, low input bias current and rail-to-rail input/output, which makes this device suitable for precision rectifier applications. Figure 4-8 shows a precision half-wave rectifier and its transfer characteristic. The rectifier's input impedance is determined by the input resistor R1. To avoid the loading effect, it must be driven from a low-impedance source. When VIN is greater than zero, D1 is OFF, D2 is ON, and VOUT is zero. When VIN is less than zero, D1 is ON, D2 is OFF, and VOUT is the VIN with an amplification of -R2/R1. The rectifier circuit shown in Figure 4-8 has the benefit that the op amp never goes in saturation, so the only thing affecting its frequency response is the amplification and the gain bandwidth product.
.
The MCP6441 op amp is well suited for conditioning sensor signals in battery-powered applications. Figure 4-9 shows a two op amp instrumentation amplifier, using the MCP6441 device, that works well for applications requiring rejection of Common Mode noise at higher gains. The reference voltage (VREF) is supplied by a low-impedance source. In single supply applications, VREF is typically VDD/2. RG VREF R1 R2 R2 R1 VOUT
V2 MCP6441 V1 R1 2R 1 VOUT = ( V1 - V 2 ) 1 + ----- + -------- + VREF R2 RG MCP6441
FIGURE 4-9: Two Op Amp Instrumentation Amplifier.
R2 D2 VIN R1 VOUT MCP6441 D1
Precision Half-Wave Rectifier VOUT -R2/R1
VIN Transfer Characteristic
FIGURE 4-8: Rectifier.
Precision Half-Wave
DS22257A-page 16
(c) 2010 Microchip Technology Inc.
MCP6441
5.0 DESIGN AIDS
5.4
Microchip provides the basic design tools needed for the MCP6441 op amp.
Microchip Advanced Part Selector (MAPS)
5.1
SPICE Macro Model
The latest SPICE macro model for the MCP6441 op amp is available on the Microchip web site at www.microchip.com. The model was written and tested in the official OrCAD (Cadence(R)) owned PSpice(R). For the other simulators, translation may be required. The model covers a wide aspect of the op amp's electrical specifications. Not only does the model cover voltage, current and resistance of the op amp, but it also covers the temperature and the noise effects on the behavior of the op amp. The model has not been verified outside of the specification range listed in the op amp data sheet. The model behaviors under these conditions cannot ensure it will match the actual op amp performance. Moreover, the model is intended to be an initial design tool. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves.
MAPS is a software tool that helps semiconductor professionals efficiently identify the Microchip devices that fit a particular design requirement. Available at no cost from the Microchip website at www.microchip.com/ maps, the MAPS is an overall selection tool for Microchip's product portfolio that includes Analog, Memory, MCUs and DSCs. Using this tool, you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparison reports. Helpful links are also provided for Data Sheets, Purchase and Sampling of Microchip parts.
5.5
Analog Demonstration and Evaluation Boards
Microchip offers a broad spectrum of Analog Demonstration and Evaluation Boards that are designed to help you achieve faster time to market. For a complete listing of these boards and their corresponding user's guides and technical information, visit the Microchip web site at www.microchip.com/analogtools. Some boards that are especially useful are: * * * * * * MCP6XXX Amplifier Evaluation Board 1 MCP6XXX Amplifier Evaluation Board 2 MCP6XXX Amplifier Evaluation Board 3 MCP6XXX Amplifier Evaluation Board 4 Active Filter Demo Board Kit 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
5.2
FilterLab(R) Software
Microchip's FilterLab software is an innovative software tool that simplifies analog active filter design using op amps. Available at no cost from the Microchip web site at www.microchip.com/filterlab, the FilterLab design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the macro model to simulate the actual filter performance.
5.3
MindiTM Circuit Designer and Simulator
Microchip's Mindi Circuit Designer and Simulator aids in the design of various circuits useful for active filter, amplifier and power-management applications. It is a free online circuit designer and simulator, available from the Microchip web site at www.microchip.com/mindi. This interactive circuit designer and simulator enables designers to quickly generate circuit diagrams and simulate circuits. Circuits developed using the Mindi Circuit Designer and Simulator can be downloaded to a personal computer or workstation.
(c) 2010 Microchip Technology Inc.
DS22257A-page 17
MCP6441
5.6 Application Notes
The following Microchip Analog Design Note and Application Notes are available on the Microchip web site at www.microchip.com/appnotes, and are recommended as supplemental reference resources. * ADN003 - "Select the Right Operational Amplifier for your Filtering Circuits", DS21821 * AN722 - "Operational Amplifier Topologies and DC Specifications", DS00722 * AN723 - "Operational Amplifier AC Specifications and Applications", DS00723 * AN884 - "Driving Capacitive Loads With Op Amps", DS00884 * AN990 - "Analog Sensor Conditioning Circuits - An Overview", DS00990 * AN1177 - "Op Amp Precision Design: DC Errors", DS01177 * AN1228 - "Op Amp Precision Design: Random Noise", DS01228 * AN1297 - "Microchip's Op Amp SPICE Macro Models", DS01297 These application notes and others are listed in the design guide: * "Signal Chain Design Guide", DS21825
DS22257A-page 18
(c) 2010 Microchip Technology Inc.
MCP6441
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
5-Lead SC70
Example:
XXNN
DG25
5-Lead SOT-23
Example:
XXNN
WU25
Legend: XX...X Y YY WW NNN
e3
* Note:
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
(c) 2010 Microchip Technology Inc.
DS22257A-page 19
MCP6441
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DS22257A-page 20
(c) 2010 Microchip Technology Inc.
MCP6441
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(c) 2010 Microchip Technology Inc.
DS22257A-page 21
MCP6441
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DS22257A-page 22
(c) 2010 Microchip Technology Inc.
MCP6441
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
(c) 2010 Microchip Technology Inc.
DS22257A-page 23
MCP6441
NOTES:
DS22257A-page 24
(c) 2010 Microchip Technology Inc.
MCP6441
APPENDIX A: REVISION HISTORY
Revision A (September 2010)
* Original Release of this Document.
(c) 2010 Microchip Technology Inc.
DS22257A-page 25
MCP6441
NOTES:
DS22257A-page 26
(c) 2010 Microchip Technology Inc.
MCP6441
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device T -X /XX Examples:
a) b)
Device: MCP6441: Single Op Amp (Tape and Reel) (SC70, SOT-23)
Tape and Reel Temperature Package Range
MCP6441T-E/LT: MCP6441T-E/OT:
Tape and Reel, 5LD SC70 Package Tape and Reel, 5LD SOT-23 Package
Temperature Range: E
= -40C to +125C
Package:
LT OT
= Plastic Package (SC70), 5-lead = Plastic Small Outline Transistor (SOT-23), 5-lead
(c) 2010 Microchip Technology Inc.
DS22257A-page 27
MCP6441
NOTES:
DS22257A-page 28
(c) 2010 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2010, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
ISBN: 978-1-60932-513-8
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2010 Microchip Technology Inc.
DS22257A-page 29
Worldwide Sales and Service
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
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EUROPE
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08/04/10
DS22257A-page 30
(c) 2010 Microchip Technology Inc.

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